Designed digital systems from high level architectural to low level design. Managed numerous functions in support of the designs such as: synthesis and design verification processes on massively parallel hardware accelerators. Created image processing algorithms and tested on prototype hardware.
Led development of high-level image processing algorithms and architectures through multiple design levels.
Team designed image processing algorithms, which produced industry leading copy quality for digital copier product line and a very low Unit Manufacturing Cost (UMC).
Produced hardware imaging pipeline consisting of Application Specific Integrated Circuits (ASIC) in a single turn due to comprehensive testing procedures.
Partnered with Motorola to develop a commercial memory component. Led the corporation through unique design experience and developed internal model to assure design time advantage. Project reduced subsystem cost by 10% resulting in at least $10M savings over product life.